1. Field of the Invention
The present invention relates to a semiconductor memory and, more particularly, to a semiconductor frame buffer memory for temporarily storing image data in bit map control type image display systems of computer installations.
2. Description of the Prior Art
A display device such as a CRT (cathode ray tube) display device is an indispensable component of a computer terminal. Recently such display devices have been improved to achieve higher resolution for use in a bit map control system. This type system allows display control of picture element units, and is commonly used in the display of graphics, as well as characters.
FIG. 7 shows a computer that uses a CRT display device 71 of the bit map control type. The computer system basically includes a processor 73, a main memory 74, a frame buffer 72 and the CRT display device 71. The frame buffer 72 is coupled to the processor 73 through a data bus 75 and to the CRT display device 71. The buffer 72 temporarily stores image data to be displayed. As the resolution power of the CRT display device 71 has been improved, and the amount of information per image has increased, a multi-bit memory has been used as the frame buffer 72. In such a multi-bit memory, one word consists of 4 bits or 8 bits, etc., rather than 1 bit. It is likely that such multi-bit memories will become more common in the future.
As the bit map control type CRT display device 71 has become more common, a need has developed for an image processing apparatus that permits image rotation, enlargement, reduction, etc. on the CRT display device 71. Generally, these image processing operations must start from an arbitrary bit position on the CRT display device 71. Data in the frame buffer 72 are connected to prescribed bus lines normally in byte units (8 bits) or word units (16 bits). Thus, the system must have the capability (referred to as bit boundary access function) to read or write byte data or word data starting from any bit position regardless of the location of byte or word boundaries in the frame buffer 72. More particularly, what is needed is the ability to access frame buffer 72 for reading or writing data starting from any bit position on the screen, as illustrated in FIG. 8 when various data items of single-word units of image data stored in the frame buffer are arranged in correspondence to display positions on a non-interlaced type screen.
Conventionally, an apparatus for performing the bit boundary access function included a circuit employing a large number of logic elements outside the memory, i.e., the frame buffer 72. This has led to problems due to the increased number of required circuits and associated higher costs.